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SP6650
Ideal for portable designs powered with Li Ion battery
High Efficiency 600mA Synchronous Buck Regulator
FEATURES 95% High Efficiency Proprietary Control Loop 2.7V to 6.5V Input Voltage Range 3.3V or Adjustable Output Voltage Range 2% Output Voltage Accuracy 600mA Output Current 100% Duty Cycle Operation Programmable Inductor Peak Current Limit (0.95A or 0.5A) No External FET's Required 3V Battery Low Indicator 2.7V Undervoltage Lockout Shutdown Control Small 10-Pin MSOP
PVIN 1 VIN 2 BLON 3 ILIM 4 SHDN 5
10 LX
SP6650
10 Pin MSOP
9 PGND 8 GND 7 VOUT 6 FB
Now Available in Lead Free Packaging
APPLICATIONS PDA CD Player ADSL Modem Digital Still Camera DESCRIPTION
The SP6650 is ideal for portable applications that use a Li-Ion or 3 to 4 cell alkaline/NiCd/NiMH input. The SP6650 extends battery life with it's unique control loop scheme (patent pending), which maintains high efficiency levels (> than 90%) over a wide range of output currents. Features such as Inductor peak current control, protects the power supply from overload or short circuit conditions, controls the startup current to prevent output overshoot and excessive battery drop, and gives the user more flexibility in choosing an appropriate coil to optimize solution cost, size and performance. Other features include a dedicated pin for manual shutdown, a battery low indicator, and thermal protection. TYPICAL APPLICATIONS CIRCUIT
2.7-6.5 VDC
(R)
L1 22H
LX
1
RB 100k
PVIN VIN BLON ILIM SHDN
10 9 8 7 6 C4 470pF VOUT 3.3V or 1.25V to 5.0V
2
R1 10
PGND
3 4 5
SP6650
GND VOUT FB
R4 100k
C1 1F
C2 47F
R2 164k
C3 47F R3 100k
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. PVIN, VIN. ........................................................... 7V All other pins .............................. -0.3V to VIN +0.3V PVIN, PGND, LX current .................................... 2A Storage Temperature .................... -65C to 150C Lead Temperature (Soldering 10sec) .......... 300C
ELECTRICAL CHARACTERISTICS
Specifications apply for -40C to +85C, VOUT = 3.3V, VIN = 3.6V, ILIM = SHDN = VIN, FB = GND, L1 = 22H, COUT = CIN = 47F, unless otherwise noted.
PARAMETER Input Voltage Operating Range Undervoltage Lockout Threshold Undervoltage Lockout Hysteresis FB Set Voltage, VREF VREF Load Regulation VREF Line Regulation VREF Line and Load Regulation VOUT Accuracy VOUT Line and Load Regulation On-Time Constant - KON Minimum TON = KON/ (VIN-VOUT) PMOS Switch Resistance NMOS Switch Resistance VIN Pin Quiescent Current VIN Pin Shutdown Current VOUT Pin Quiescent Current VOUT Pin Shutdown Current Power Efficiency
MIN. UVLO 2.6 1.23
TYP.
MAX. 6.5
UNITS V V mV V % % %
CONDITIONS
2.7 120 1.25 0.5 0.5 0.65
2.8 1.27
VIN Rising VOUT tied to FB Pin ILOAD = 0 to 600mA VIN = 3.6V, VOUT = 3.3V VIN = 3.6V to 6.5V VOUT = 3.3V, ILOAD = 200mA VIN = 3.6V to 6.5V ILOAD = 0 to 600mA ILOAD = 100mA, VIN = 3.6V VIN = 3.6V to 6.5V ILOAD = 0 to 600mA
3.23 3.17
3.30 3.30 2.7 0.4 0.3 70 0.3 7 0.1 92 95 88
3.37 3.43
V V s*V
0.8 0.8 150 500 12 500
A nA A nA % % % mA mA
IPMOS = 200mA INMOS = 200mA SHDN = VIN = FB = 1.5V SHDN = 0V SHDN = VIN = FB = 1.5V SHDN = 0V ILOAD = 600mA ILOAD = 100mA ILOAD = 1mA ILIM = VIN ILIM = 0V ILIM = VIN ILIM = 0V
Minimum Guaranteed Load Current Inductor Current Limit Inductor Current Limit
600 300 0.75 0.40
700 350 0.95 0.50 -100 1.15 0.60
A A ppm/C
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
2
SPECIFICATIONS (continued)
Specifications apply for -40C to +85C, VOUT = 3.3V, VIN = 3.6V, ILIM = SHDN = VIN, FB = GND, L1 = 22H, COUT = CIN = 47F, unless otherwise noted.
PARAMETER Falling BLON Trip Voltage BLON Trip Voltage Hysteresis BLON Low Output Voltage BLON Leakage Current Rising Over-Temperature Trip Point Over-Temperature Hysteresis SHDN, ILIM Leakage Current SHDN, ILIM Input Threshold Voltage
MIN. 2.88
TYP. 3.00 2.9
MAX. 3.12 0.4 1
UNITS V % V A C C
CONDITIONS
VIN = VOUT = 3.0V, ISINK = 1mA VBLON = 3.3V
140 14 1 0.60 0.60 0.90 1.25 500 1.8 1.8
nA V V High to Low Transition Low to High Transition
BLOCK DIAGRAM
VIN
PVIN
Internal Supply
Min TOFF VIN Min TON
REF
+
C
-
M
1
+
C
+
REF/2 ILIM/M
-
overcurrent
C VOUT
-
LX UVLO TSD
+
FB
C
-
SHDN Ref Block ILIM
REF REF/2
Q Q
D
VIN
PGND
ILIM/M REF
+
CLR
GND
VIN
C
-
BLON UVLO SHDN
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
3
PIN DESCRIPTION
PIN NUMBER PIN NAME DESCRIPTION
1
PVIN VIN BLON
Input voltage power pin. Inductor charging current passes through this pin. Internal supply voltage. Control circuitry powered from this pin. Open drain battery low output. VIN below battery low threshold pulls this node to ground. VIN above threshold, this node is open. Inductor current limit programming pin. Tie pin to VIN for 0.95A peak inductor current limit. Tie pin to ground for 0.5A peak inductor current limit. TTL input threshold. Shutdown control input. Tie to VIN for normal operation, tie to ground for shutdown. TTL input threshold. External feedback network input connection. Connect a resistor from FB to ground and FB to VOUT to control the output voltage externally. This pin regulates to the internal bandgap reference voltage of 1.25V. Tie FB to ground to use the internal divider for a preset output voltage of 3.3V. Output voltage sense pin. Used for internal feedback divider and timing circuit. Internal ground pin. Control circuitry returns current to this pin. Power ground pin. Synchronous rectifier current returns through this pin. Inductor switching node. Inductor tied between this pin and the output capacitor to create regulated output voltage.
2
3
4
ILIM
5
SHDN
6
FB
7
VOUT GND
8
9
PGND
10
LX
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
4
OPERATION The SP6650 is a synchronous buck regulator with an input voltage range of +2.7V to +6.5V and an output that is either preset to +3.3V, or adjustable between +1.25V and VIN. The SP6650 features a unique on-time control loop that runs in discontinuous conduction mode (DCM) or continuous conduction mode (CCM) using synchronous rectification. Other features include overtemperature shutdown, overcurrent protection, undervoltage lockout, digitally controlled enable, a battery low indicator, and an external feedback pin. The SP6650 operates with a light load quiescent current of 70A using a 0.4 PMOS main switch and a 0.3 NMOS auxiliary switch. It operates with excellent efficiency across the entire load range, making it an ideal solution for battery powered applications and low current step-down conversions. The part smoothly transitions into a 100% duty cycle under heavy load/ low input voltage conditions. On-Time Control The SP6650 uses a precision comparator and a minimum on-time one-shot to regulate the output voltage and control the inductor current under normal load conditions. As the feedback node (negative terminal of the loop comparator) drops below the reference, the loop comparator output goes high and closes the main switch. The minimum on-time one shot is triggered, setting a logic high for the duration defined by: TON = KON VIN-VOUT
logic low, or the inductor current limit has been reached. The discharge phase follows with the high side PMOS switch opening and the low side NMOS switch closing to provide a discharge path for the inductor current. The decreasing inductor current and the load current cause the output voltage to droop. Under normal load conditions when the inductor current is below the programmed limit, the off-time will continue until the output voltage falls below the regulation threshold, which initiates a new charge cycle via the loop comparator. The inductor current "floats" in continuous conduction mode. During this mode the inductor peak current is below the programmed limit and the valley current is above zero. This is to satisfy load currents that are greater than half the minimum current ripple. The current ripple, ILR, is defined by the equation: ILR KON * VIN-VOUT-IOUT*Rch L VIN-VOUT where: L = Inductor value IOUT = Load current Rch = PMOS on resistance, 0.4 typ. If the IOUT*Rch term is negligible compared with (VIN-VOUT), the above equation simplifies to: K ILR ON L For most applications, the inductor current ripple controlled by the SP6650 is constant regardless of input and output voltage. Because the output voltage ripple is equal to: VOUT(ripple) = ILR*RESR where: RESR = ESR of the output capacitor the output ripple of the SP6650 regulator is independent of the input and output voltages. For battery powered applications, where the battery voltage changes significantly, the SP6650 provides constant output voltage ripple throughout the battery lifetime. This greatly simplifies the LC filter design.
where: KON = 2.7s*V constant VIN = VIN pin voltage VOUT = VOUT pin voltage The outputs of the loop comparator and the ontime one shot are OR'd together, inverted, and buffered to drive the gate of the high side PMOS main switch. Increasing inductor current causes the output to increase through the ESR (equivalent series resistance) of the output capacitor. As VOUT rises above the regulation threshold, the loop comparator output resets low. Termination of the on cycle occurs when both the loop comparator and the on-time one shot goes to
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
5
On-Time Control: continued The maximum loop frequency in CCM is defined by the equation: FLP (VIN-VOUT)*(VOUT+IOUT*Rdc) KON*[VIN+IOUT*(Rdc-Rch)]
where: FLP = CCM loop frequency Rdc = NMOS on resistance, 0.3typ. Ignoring conduction losses simplifies the loop frequency to 1 VOUT FLP = * * (VIN-VOUT) KON VIN OR'ing the loop comparator and the on-time one shot reduces the switching frequency for load currents below half the inductor ripple current. This increases light load efficiency. The minimum on-time insures that the inductor current ripple is a minimum of KON/L, more than the load current demands. The converter goes in to a standard pulse frequency modulation (PFM) mode where the switching frequency is proportional to the load current. Low Dropout and Load Transient Operation OR'ing the loop comparator also increases the duty ratio past the ideal D=VOUT/VIN up to and including 100%. Under a light to heavy load transient, the loop comparator will hold the main switch on past the on-time one shot pulse until the output is brought back into regulation. Also, as the input voltage supply drops down close to the output voltage, the main MOSFET resistance loss will dictate a much higher duty ratio to regulate the output. Eventually as the input voltage drops low enough, the output voltage will follow, causing the loop comparator to hold the converter at 100% duty cycle. This mode is critical in extending battery life when the output voltage is at or above the minimum usable input voltage. The dropout voltage is the minimum (VIN - VOUT) below which the output regulation cannot be maintained. The dropout voltage of SP6650 is equal to IL (0.4 + RL) where 0.4 is the typical
RDS(ON) of the P-Channel MOSFET and RL is the DC resistance of the inductor. The on-time control circuit seamlessly operates the converter between CCM, DCM, and low dropout modes without the need for compensation. The converter's transient response is quick since there is no compensated error amplifier in the loop. Inductor Over-Current Protection The inductor over-current protection circuitry is programmed to limit the peak inductor current to 950mA (pin 4 tied to VIN) or 500mA (pin 4 to ground). This is done during the on-time by comparing the source to drain voltage drop of the PMOS passing the inductor current with a second voltage drop representing the maximum allowable inductor current. As the two voltages become equal, the over-current comparator triggers a minimum off-time one shot. The off-time one shot forces the loop into the discharge phase for a minimum time causing the inductor current to decrease. At the end of the off-time loop, control is handed back to the OR'd on-time signal. If the output voltage is still low, charging begins until the output is in regulation or the current limit has been reached again. During startup and overload conditions, the converter behaves like a current source at the programmed limit minus half the current ripple. The minimum TOFF is 6s (typ.) at VOUT = 0V and 2s (typ.) for VOUT greater than 1.5V. Under-Voltage Lockout The SP6650 is equipped with under-voltage lockout to protect the input battery source from excessive currents when substantially discharged. When the input supply is below the UVLO threshold both power switches are open to prevent inductor current from flowing. The internal reference and regulator circuitry are enabled drawing the 70A light load quiescent current on pin 2. The rising input voltage UVLO threshold is +2.7V, with a typical hysteresis of 120mV to prevent chattering due to the impedance of the input source.
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
6
Under-Current Detection The synchronous rectifier is comprised of the inductor discharge switch, a voltage comparator, and a latch. During the off-time, positive inductor current flows into the PGND pin 9 through the low side NMOS switch to LX pin 10, through the inductor and the output capacitor, and back to pin 9. The comparator monitors the voltage drop across the discharge NMOS. As the inductor current approaches zero, the channel voltage sign goes from negative to positive, causing the comparator to trigger the latch and open the switch to prevent inductor current reversal. This circuit along with the ontime one shot puts the converter into PFM mode and improves light load efficiency when the load current is less than half the inductor ripple current defined by KON/L. Thermal Shutdown The converter will open both power switches if the die junction temperature rises above 140C. The die must cool down below 126C before the regulator is re-enabled. This feature protects the SP6650 and surrounding circuitry from excessive power dissipation due to fault conditions. Shutdown/Enable Control Pin 5 of the device is a logic level control pin that shuts down the converter with a logic low, or enables the converter with a logic high. When the converter is shut down, the power switches are opened and all circuit biasing is extinguished leaving only junction leakage currents on supply pins 1 and 2. After pin 5 is brought high to enable the converter, there is a turn on delay to allow the regulator circuitry to re-establish itself. Power conversion begins with the assertion of the internal reference ready signal which occurs approximately 150s after the enable signal is received.
Battery Low Indicator The regulator bias voltage on pin 2 (VIN) is divided down and compared to the internal +1.25V reference voltage. When pin 2 voltage drops below +3.00V, an open drain NMOS on pin 3 (BLON) sinks current to ground. Tying a resistor from pin 3 to VIN or VOUT creates a logic level battery low indicator. A low bandwidth comparator and 2.9% hysteresis filter the input voltage ripple to prevent noisy transitions at the threshold. External Feedback Pin The SP6650 comes with a factory preset output voltage of +3.3V when pin 6 (FB) is grounded. Otherwise, the output voltage can be externally programmed within the range +1.25V to +5.0V by tying a resistor from FB to ground and FB to VOUT (pin7). See the applications section for resistor selection information.
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
7
TYPICAL PERFORMANCE CHARACTERISTICS
100 95
3.380 3.370 3.360
Efficiency (%)
90
VOUT
85 80 75 70 65 1.0 10.0
VIN = 3.0V VIN = 4.2V VIN = 5.0V VIN = 6.5V
3.350 3.340 3.330 3.320
VIN = 3.67V VIN = 4.2V VIN = 5.0V VIN = 6.5V
100.0
600.0
0
100
200
300
400
500
600
Iload (mA)
ILOAD (mA)
Figure 1. Efficiency vs. Output Current, VOUT = 3.3V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
Figure 2. Line/Load Rejection, VOUT = 3.3V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
200 180 160 120 100 80 60 40 20 0 3.0
100 95
Efficiency (%)
140
90 85 80 75 70
VIN = 3.0V VIN = 3.6V VIN = 4.2V VIN = 5.0V VIN = 6.5V
IIN (A)
4.0
5.0
6.0
7.0
VIN
65 1.0
10.0
100.0
600.0
Iload (mA)
Figure 3. No Load Battery Current, VOUT = 3.3V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
Figure 4. Efficiency vs. Output Current, VOUT = 2.5V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
2.495 2.485 2.475
200 180 160 140 120 100 80 60 40 20 0 3.0
2.465 2.455 2.445
0
VIN = 3.0V VIN = 3.6V VIN = 4.2V VIN = 5.0V VIN = 6.5V
100
200
300
400
500
600
IIN (A)
VOUT
Iload (mA)
4.0
5.0
6.0
7.0
VIN
Figure 5. Line/Load Rejection, VOUT = 2.5V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
Figure 6. No Load Battery Current, VOUT = 2.5V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
8
TYPICAL PERFORMANCE CHARACTERISTICS
100 95 90
1.292 1.287 1.282 1.277 1.272 1.267
10.0 100.0 600.0
0 100 200 300 400 500 600
VIN = 3.0V VIN = 3.6V VIN = 4.2V VIN = 5.0V VIN = 6.5V
Efficiency (%)
85 80 75 70 65 60 55 50 1.0
VIN = 3.0V VIN = 3.6V VIN = 4.2V VIN = 5.0V VIN = 6.5V
VOUT
Iload (mA)
Iload (mA)
Figure 7. Efficiency vs. Output Current, VOUT = 1.25V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
Figure 8. Line/Load Rejection, VOUT = 1.25V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
200 180 160 120 100 80 60 40 20 0 3.0
100 90 80 70 60 50 40 30 20 10 0
4.0 5.0 6.0 7.0
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100
IQ OP (A)
140
IIN (A)
IIN IOUT
VIN
Temperature (C)
Figure 9. No Load Battery Current, VOUT = 1.25V, L1 = 22H (Sumida CDRH6D28), ILIM = VIN
Figure 10. Quiescent Current vs. Temperature. VIN = 3.6V, SHDN = VIN (Enabled)
50 40
IIN IOUT
IQ sd (nA)
30 20
10 0 -50 -40 -30 -20 -10
0
10 20 30 40 50 60 70 80
90 100
Temperature (C)
Figure 11. Quiescent Current vs. Temperature. VIN = 3.6V, SHDN = GND (Shutdown)
Figure 12. Load Step Transient Response, VOUT = 2.5V, 10mA to 500mA. L1 = 22H (Sumida CDRH6D28), ILIM = VIN
(c) Copyright 2004 Sipex Corporation
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
9
Figure 13. Load Step Transient Response, VOUT = 2.5V, 500mA to 10mA. L1 = 22H (Sumida CDRH6D28), ILIM = VIN
Figure 14. Low ILIM Startup, VIN = 4.2V, VOUT = 3.3V. ILIM tied to GND, Internal Feedback RLOAD = 33.
Figure 15. Dead Short. VIN = 5.0V, ILIM tied to GND. Start IOUT = 37mA, VOUT = 3.3V. Finish IOUT = 500mA, VOUT = 20mV.
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
10
APPLICATION INFORMATION External Component Selection Inductor According to the pulse frequency modulation (PFM) algorithm, the peak to peak output ripple current can be calculated as: ILR KON L All components recommended for typical designs like those shown in the applications schematics are given in Table 1. Input and Output Capacitors Output capacitor is often selected based on the requirement on the output ripple voltage. In a Buck regulator, the output ripple is determined by ESR (equivalent series resistor) of the output capacitors and inductor ripple current VOR = ESR * ILR, where VOR = peak to peak output ripple voltage. SP6650's adaptive on-time scheme provides a constant inductor ripple that is independent of input voltages and thus makes it easier to select the output capacitor. In many power supply designs, the ripple voltage needs to be less than 3% of the DC output voltage. Using low ESR tantalum or electrolytic capacitors to reduce the output ripple. Due to the nature of the PFM control, certain output ripple is required for stable operation. The loop comparator requires minimum of 15mV ripple on the FB pin to reliably toggle the comparator output. That translates to an output ripple of VOR(MIN) = 15mV * VOUT VREF where VREF = 1.25V is the internal reference voltage. To reduce the output ripple and improve stability, a small capacitor can be paralleled with the feedback voltage divider as shown on page 1. This capacitor forms a high pass filter with feedback resistor to increase the ripple voltage seen by the FB pin. The value of the capacitor should be in the range of 100pF to 500pF. Although the 3.3V output can be programmed simply by connecting the FB pin to the ground, using this external feedback scheme can significantly reduce the output ripple. For output ripple less than 15mV, for instance when ceramic capacitors are used, an artificial ramp can be generated and superimposed onto the output.
(c) Copyright 2004 Sipex Corporation
KON = 2.7s*V is a constant for SP6650 and is set by the parameters of the internal ON-time calculation circuitry. For the recommended 22H inductor, typical ripple currents are ILR = 123mA in discontinuous conduction mode (DCM) operation. During continuous conduction mode, the speed of the loop comparator determines the current ripple. It is approximately equal to 200mA with a 22H inductor. The value of the inductor is chosen based on the constant KON and acceptable current ripple. Two additional inductor parameters are important: its current rating and its DC resistance. When the current through the inductor reaches the level of Isat, inductance drops down to 70% from the nominal. This non-linear change can cause stability problems or excessive fluctuation in current ripple. To avoid this, the inductor should be chosen with saturation current at least equal to the maximum output current of the converter plus half of the ripple. To provide the best converter performance in dynamic conditions such as start-up and load transients, inductors with saturation current close to the chosen ILIM are recommended. The second important inductor parameter, DC resistance, directly defines the efficiency of the converter, therefore, the inductor should be chosen with the minimum possible DC resistance for a particular design. Recommended types of the inductors for different applications are given in Table 1. Preferred inductors for on board power supplies with the SP6650 converter are shielded inductors to minimize radiated magnetic fields emissions.
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
11
APPLICATION INFORMATION The schematic and description is shown in Additional Application Circuits. Another function of the output capacitor is to hold up the output voltage during the load transient, and thus prevent excessive overshoot and undershoot. For that, the recommended capacitor value is greater than 22uF. An input capacitor can reduce the peak current drawn from the battery, improve efficiency, and significantly reduce high frequency noises induced by a switching power supply. The applicable capacitors are tantalum, electrolytic and ceramic capacitors. An RC filter is recommended on the Vin pin (pin 2) to effectively cut down the noise which can impact the IC control circuit. The time constant of the RC filter needs to be at least 5 times higher than the switching period, calculated as 1/FLP during CCM. TABLE 1.
DESIGNATION DESCRIPTION MANUFACTURER PART NUMBER COMMENTS
Output Voltage Program The output voltage can be programmed by the external voltage divider as shown on page 1. First pick a resistor value less than 100k for R3. A large R3 value would reduce the AC voltage seen by the loop comparator because the FB pin capacitance (can be as high as 10pF) can form a low pass filter with R3 paralleling with R2. Lack of AC voltage to the loop comparator would give rise to pulse jittering and higher output ripple. Once the R3 value is picked, R2 can be calculated from
R2 =
(
VOUT - 1 R3 VREF
)
22H/0.77Arms/0.104DCR INDUCTOR L1 22H/1.1Arms/0.071DCR 22H/0.095DCR 47H/0.76Arms/0.15DCR 47H/0.72Arms/0.37DCR C2, C3 47F/350m/500mA
TDK MURATA SUMIDA MURATA SUMIDA NEMCO AVX AVX AVX Any approved
SLF7030T-220MR86 LQS66C220M04 CDRH6D28 LQS66C470M04 CR54 LSR47/10C-350 TPSC476010R0350 TPSC336010R0375 TPSB226010R0700
SHIELDED
SHIELDED SHIELDED
INPUT, OUTPUT 47F/350m/500mA FILTER CAPACITORS R2,R3 R1 33F/375m/542mA 22F/700m/348mA 100K/63mW/1%Tolerance 10/63mW/5%Tolerance
Any Package: 0402,0505,0603 etc.
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
12
ADDITIONAL APPLICATION CIRCUITS
Vin 2.7-6.5 VDC
CIN 47F RB 100k RVIN 10.0
(R)
L1 22H
LX
1 2 3
CVIN 1.0F
PVIN VIN BLON ILIM SHDN
10 9 8 7 6 R2 160k R3 100k Rf 4.99k Cf 33nF
3.3V/600mA
PGND
SP6650 U1 GND
VOUT FB
4 5
COUT 47F
Figure 16. Additional Application Circuit with Low Output Ripple
The additional Rf/Cf network used in Figure 16 generates an artificial ramp from the LX pin voltage and superimposes it to the feedback pin. As a result, the internal loop comparator doesn't have to rely on output ripple to run PFM. Now low ESR output capacitors, such as ceramic capacitors, can be used, and the output ripple can be reduced by two to three times. For the best result, size the Cf and Rf values so the network would introduce 10 to 30mV ripples to the FB
pin. Oversized ripple would compromise the load regulation and also cause oscillation during load transient. Load transient response and output ripples from Figure 16 circuit are shown in Figure 17 and Figure 18, respectively. The added ripple voltage can be calculated from V = KON RfCf
Figure 17. VOUT transient response from 50mA to 500mA load step. CH1- VOUT, CH4 - ILOAD
Figure 18. Output ripple CH1-output ripple. VIN = 5, VOUT = 3.3V, ILOAD = 600mA
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
13
ADDITIONAL APPLICATION CIRCUITS: continued SP6650 can also be configured with few external components to achieve buck-boost voltage conversion. Efficiency of 75% to 87% can often be obtained depending on the load current and output voltage. Figure 19 and Figure 20 demonstrate two typical applications in which the USB input is converted to a 12V and a well regulated 5V. The operation of the circuit is as follows. When the internal high side PMOS turns on, the LX pin swings to the input voltage which turns on the external NMOS Q1. A voltage equal to Vin is then applied to the inductor to cause the inductor current rise linearly. Since there's no current delivered to the output, the output capacitor is discharged by the load current. Therefore, the internal PMOS can be only turned off by the over-current comparator since the loop comparator would never toggle during this state. When the internal PMOS is open, the internal low side NMOS is turned on. This pulls the LX pin to the ground and turns off the Q1. As a
VIN 4.5-6.5 VDC CIN 47F R1 11.3k RVIN 5.0 RB 100k
(R)
result, the Schottky D2 is forward biased and conducts the inductor current to the output. Now the inductor experiences a reversed voltage equal to Vout and its current ramps down linearly. As expressed in the Operation section under Inductor Over-Current Protection, a minimum TOFF timer is activated after the over-current comparator is triggered in the previous state. Before Toff expires, the internal PMOS will not turn on, and the inductor will not be recharged even when the output voltage drops below the regulation voltage. This reduces the maximum load current that can be delivered by this circuit. Since TOFF is reverse proportional to the VOUT pin voltage, the VOUT pin is pulled up using a voltage divider tying to the input voltage. As a result, a 5V to 12V conversion can provide maximum 120mA load. This buck-boost circuit can regulate an output voltage higher, lower or equal to the input voltage.
L3 LX
D1 MBR0530TI
1 2
PVIN VIN
10
47H
12V/150mA
PGND
9 8 7 6
R3 10k Q1 FDS637AN R2 86k COUT1 100F/16V
R2 4.02k CVIN 1.0F
3 4 5
SP6650 BLON U1 GND
ILIM SHDN VOUT FB
Figure 19. Additional Application Circuit: VIN = 5.0V, VOUT = 12V, and Max ILOAD = 150mA.
VIN 4.5-6.5 VDC R1 11.3k CIN 47F RVIN 10.0 RB 100k
(R)
L1 LX
D1 MBR0530T1
1 2
PVIN VIN
10
47H
5V/250mA
PGND
9 8 7 6
COUT1 47F Cf2 470pF R3 10.2k COUT2 47F Q1 FDS637AN R2 30.9k
R2 4.02k CVIN 4.7F
3 4 5
SP6650 BLON U1 GND
ILIM SHDN VOUT FB
Figure 20. Additional Application Circuit: VIN= 5.0V, VOUT = 5.0V, ILOAD = 250mA.
Date: 5/25/04 SP6650 High Efficiency 600mA Synchronous Buck Regulator (c) Copyright 2004 Sipex Corporation
14
Layout Considerations Proper layout is a very important part of the onboard power supply, affecting normal functionality of the DC-DC converter itself and EMI. Because of the high frequency switching of the converter, the traces that couple an electric field can conduct currents under the AC voltages across the parasitic capacitance. Magnetic field coupling traces can induce currents like transformers. To avoid an excessive interference between the converter and the other active components on the board, some rules should be followed. Avoid injecting noise into the sensitive part of the circuit via the GND Plane. Input and output capacitors conduct the current through the GND Plane and high frequency components of the current can degrade the sensitive circuitry. Separate the power and signal grounds and connect them at one point to minimize the noise injected from the power ground to the signal ground. "Star" connection of the ground traces is shown on Figure 26, where GND is the minus pole of the output capacitor.
Power loops on the input and output of the converter should be laid out with the shortest and widest traces possible. The longer and narrower the trace, the higher the resistance and inductance it will have. The AC current in long traces radiates EMI noise affecting the sensitive circuits. The length of traces in series with the capacitors increases its ESR and ESL and reducing their effectiveness at high frequencies. Therefore put the input capacitor as close to the appropriate pins of the converter as possible and output capacitor close to the inductor. The external voltage feed back network should be placed very close to the FB pin as well as bypass capacitor C4. Any noise traces like the Lx pin should be kept away from the voltage feed back network and separated from it by using power ground copper to minimize EMI.
2.7 - 6.5V DC SP6650
3 R1 10 1 2 100k 3 4 1 C1 1F 5 + C2 47F PVIN VIN BLON ILIM SDN LX PGND GND VOUT FB 10 9 8 7 6 C4 470pF R2 100k 2.5V L1 22H
+ R3 100k GND_ SIGNAL
C3 47F
Figure 21. Application circuit with highlighted power traces.
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
15
PACKAGE: 10-PIN MSOP
(ALL DIMENSIONS IN MILLIMETERS)
D e1
O1
E/2
R1 R Gauge Plane L2 Seating Plane
1 2
E
E1
O1
L L1
O
e Pin #1 indentifier must be indicated within this shaded area (D/2 * E1/2)
Dimensions in (mm)
10-PIN MSOP JEDEC MO-187 (BA) Variation MIN NOM MAX 0 0.75 0.17 0.08 0.85 3.00 BSC 4.90 BSC 3.00 BSC 0.50 BSC 2.00 BSC 0.4 0.07 0.07 0 0 0.60 0.95 0.25 10 0.80 8 15 1.1 0.15 0.95 0.27 0.23
A A1 A2 b c D E E1 e e1 L L1 L2 N R R1 O O1
(b)
WITH PLATING
c
BASE METAL
D A2 b A1 A
1
Date: 5/25/04
SP6650 High Efficiency 600mA Synchronous Buck Regulator
(c) Copyright 2004 Sipex Corporation
16
ORDERING INFORMATION
Part Number Temperature Range Package Type
SP6650EU .............................................. -40C to +85C ........................................ 10-pin MSOP SP6650EU/TR ........................................ -40C to +85C ........................................ 10-pin MSOP
Available in lead free packaging. To order add "-L" suffix to part number. Example: SP6650EU/TR = standard; SP6650EU-L/TR = lead free /TR = Tape and Reel Pack quantity is 2500 for MSOP.
Corporation
ANALOG EXCELLENCE
Sipex Corporation Headquarters S233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Date: 5/25/04 SP6650 High Efficiency 600mA Synchronous Buck Regulator (c) Copyright 2004 Sipex Corporation
17


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